Kurzer Lebenslauf
Seit 2017 | Doktorand am Lehrstuhl für Elektrotechnik an der Universität Ulm |
Seit 2016 | Wissenschaftlicher Mitarbeiter am Institut für Systemdynamik an der HTWG Konstanz |
Feb. 2017 | Masterthesis an der HTWG Konstanz Thema: “ Hardwareimplementierung eines adaptiven Datenkompressionssystems” |
2015 - 2017 | Masterstudium Elektrische Systeme (M.Eng.) HTWG Konstanz |
Aug. 2015 | Bachelorthesis |
2012 - 2015 | Bachelorstudium Elektro- Informationstechnik (B.Eng.) HTWG Konstanz |
Forschungsgebiet
Datenkompression & Verschlüsslung für Flash-Speicher
- Hardwareimplementierung
- Simulation
- Untersuchung und Optimierung von Algorithmen
- FPGA Validierung
Publikationen
- M. Safieh, D. N. Bailon and J. Freudenberger, "An Acceptance Criterion for Hybrid Algebraic and Soft-input Decoding," 2020 24th International Conference on Information Technology (IT), Zabljak, Montenegro, 2020, pp. 1-5, doi: 10.1109/IT48810.2020.9070575.
- M. Safieh and J. Freudenberger, "Montgomery Modular Arithmetic over Gaussian Integers," 2020 24th International Conference on Information Technology (IT), Zabljak, Montenegro, 2020, pp. 1-4, doi: 10.1109/IT48810.2020.9070297.
- M. Safieh and J. Freudenberger, “Efficient VLSI architecture for the Parallel Dictionary LZW data compression algorithm” in IET Circuits, Devices & Systems, available online, 10.1049/iet-cds.2018.5017, 2019
- M. Safieh and J. Freudenberger, "Pipelined decoder for the limited context order Burrows–Wheeler transformation," in IET Circuits, Devices & Systems, vol. 13, no. 1, pp. 31-38, 1 2019. doi: 10.1049/iet-cds.2017.0496
- M. Safieh, J. Thiers and J. Freudenberger, "Area Efficient Coprocessor for the Elliptic Curve Point Multiplication," SCC 2019; 12th International ITG Conference on Systems, Communications and Coding, Rostock, Germany, 2019, pp. 1-6. doi: 10.30420/454862032
- M. Safieh, J. Freudenberger, “Address space partitioning for the parallel dictionary LZW data compression algorithm”, 16th Canadian Workshop on Information Theory (CWIT), Hamilton, Ontario, Canada
- Jürgen Freudenberger, Mohammed Rajab, Daniel Rohweder, Malek Safieh: A Codec Architecture for the Compression of Short Data Blocks. Journal of Circuits, Systems, and Computers 27(2): 1-17 (2018)
- Malek Safieh and Jürgen Freudenberger , “Pipelined Decoder for the Limited Context Order Burrows-Wheeler-Transformation”, IET Circuits, Devices & Systems, 1751-8598, April 2018, DOI: 10.1049/iet-cds.2017.0496